Technical Program

VOICE 2018 Papers for San Diego

*Note: The Technical Program information and schedule are subject to change

 

Device-Specific Testing

V93000-210-DST - 26-Gbps IOBIST-Based Performance Margining on a V93000 Pin Scale 1600 Tester

Derek Lee, Nvidia; Yoshino Takatoshi and Jinlei Liu, Advantest

Running BIST-based self-loopback tests on high-speed serial interfaces in high-volume manufacturing is common, effective and a low-cost solution. However, a simple IOBIST loopback test cannot determine the quality of the performance margins. This presentation explores enhanced IOBIST testing by using different ways to reduce the complexity of the loadboard design and shorten test times.

 

V93000-211-DST - Low-Cost Wafer Probe Production Test Solution for 24-Gbps to 28-Gbps CDR Optical Transceivers

Edward Huang, Semtech Canada

Wafer-probe testing has been the only way to test the quality and performance of “die-sale-only” CDR devices used in optical transceiver modules. Now build-off self-test (BOST) presents a low-cost production test solution that is being used by high-volume testing houses.

 

V93000-243-DST - Understanding Functional Test Coverage Gaps Through ATE-Assisted Self-Test on the V93000 PSSL

Brent Bullock, Advantest; Jason Rivers and Ananth Pallapothu, AMD

ATE-based functional test coverage remains a challenge due to the persistence of non-determinism and increasing SoC design complexity. Virtual system emulation combined with native PCIe support and memory emulation capabilities on the V93000 Pin Scale SL provides a path to understanding functional coverage gaps and may lead to better fault assessments within the design simulation space.

 

V93000-250-DST - Display Port 1.3 Tx Eye Measurement Using the PS9G/PSSL Hardware PRBS Checker

Lokesh Narayan, Nvidia; Jinlei Liu, Advantest

Display ports provide support for high-resolution displays, digital content protection and the addition of new features to the standard. To optimize transmitter eye measurements for display ports, Pin Scale 9G/Pin Scale SL hardware can simplify timing and pattern set-up, streamline the initializing and programming of PRBS checker and reduce test times.

 

T2000-263-DST - Case of Introduction to IoT Module by Next-Generation Hybrid System-Level Test

Yuki Watanabe, Advantest

Testing IoT modules requires system-level testing of various functions including wireless communication. This presentation introduces a measurement solution for mass production using the T2000.

 

V93000-328-DST - 8X Simultaneous RF Scalar Measurements for Next-Generation 4x4 MIMO Wi-Fi Devices

David Hiltner, Neugen; Nasim Islam, Quantenna

The V93000 Port Scale RF instrument can test next-generation RF 802.11ax/ac/n/a 4x4 MIMO 5-GHz wi-fi devices in high-volume production without compromising test coverage or quality. Typical performance data and test time reduction results are presented.

 

V93000-383-DST - Delayed Binning Implementation on the V93000

Nolan Riley, Texas Instruments; Pete Hodakievic and Chris Green, Advantest

Although the V93000 has robust binning support built into SmarTest, there are situations in which delaying all binning decisions until the end of the flow is preferred. This presentation discusses binning issues, reviews a production example of near-zero test time overhead delayed binning, and compares it to a previous implementation to explore key features.

 

Internet of Things (IoT)

T2000-214-IoT - Testing a Bluetooth Low Energy for STM’s MCD Division with the T2000 12GWSGA RF Option

Philippe Cavallera, STMicroelectronics; Simondavide Tritto, Nobuhiro Shimizu and Kenji Nishi, Advantest

STMicroelectronics and Advantest jointly developed a quad-site mother/daughter board engineering set-up to validate the T2000’s capabilities in testing microcontrollers. This paper describes the hardware and software set-up, explains test flow development and demonstrates the measurement quality and throughput optimization achieved.

 

V93000-215-IoT - Port Scale RF with CTH: Sixteen Sites RF Testing of ZigBee Devices for an IoT Application

Jonvyn Wongso, Microchip Technology

Increasing the parallelism of an existing tester and test head involves many considerations. Evaluating the maximum possible multi-site efficiency, calculating the cost of test, and implementing techniques and test methodologies such as site-interlacing and channel resource sharing all factor into the decision making.

 

V93000-225-IoT - Using the AVI64 for Heart-Rate Sensor Test

Crystal Zheng, Advantest; Yongxin Weng, HuaTeck; Yusheng Jin, Goodix

To meet the testing needs for a customer’s heart-rate sensor, the authors developed a low-cost, high-accuracy ADC test solution during wafer-level test. This highly parallel solution leverages the V93000 platform with the AVI64 universal analog module.

 

T2000-252-IoT - Super-Wideband Modulation Analysis Technique for 5G with the T2000 Local Sweep Digitizer

Yoshiyuki Aoki, Advantest

The local sweep digitizer introduced in this paper analyzes super-wideband modulated signals by limiting the IF signal to a narrow band with a band pass filter (BPF) and varying the local frequency. This provides an inexpensive 5G test solution without using a high-performance digitizer.

 

V93000-267-IoT - V93000 Test Solution for a Narrow-Band (NB) IoT Device

Pu Lei, Daniel Sun, Frank Goh, Yongjun Hu and Max Seminario, Advantest; Lei Hua, Sanechips

Narrow-band IoT (NB-IoT), a wide-area-network solution evolved from LTE, is the latest wireless standard for IoT. Applications include intelligent lighting, smart meters, smart parking, pet tracking and more. A case study of a NB-IoT device currently in production is presented.

 

V93000-344-IoT - Wave Scale and SmarTest 8 are Enabling Low-Cost and Efficient Testing of LTE-M IoT Transceivers

Vladimir Kofman and Alex Perlman, Advantest; Gil Rafalovich, Altair

Any device targeting the IoT market is very cost sensitive. Low-cost, high-throughput test solutions for LTE-M IoT transceivers can be achieved using WaveScale RF/MX instrumentation and SmarTest 8. Multiple software features have been added and improved.

 

V93000-370-IoT - Modern LTE IoT, Technology, Learnings and x16 Volume Testing on Port Scale RF

Jerry Chen, Edwin Lowery and Kimi Chiang, Advantest; Jerry Yang, MediaTek

To realize multi-site testing of narrow-band IoT modules, semi-parallel testing can be used. This also minimizes the tester resources required. With site-interlacing, test program coding can be done with minimum modification while also improving testing efficiency.

 

Hot Topics

V93000-240-HT - Monitoring Evolutionary Algorithm in Device Testing

Kun Xu and Songmiao Wang, Advantest; Yuxiang Tian, Spreadtrum Communications

The semiconductor fabrication and packaging process inevitably introduces some errors and parameter shifts. The device testing environment also introduces some uncertainty factors that can affect test results and even test quality. This paper proposes a new algorithm to monitor real-time DC test data during mass production.

 

V93000-273-HT - 10th Anniversary of Test Program Encryption on the V93000

Adam Knecht, Qualcomm; Wen-Jing Song, Sebastian Wagner and Helmut Schmid, Advantest

A test program’s IP includes patterns, test methods, protocol register settings and more. While some of this IP should not be readable, other parts must be reviewable so that authorized professionals can export them back to an engineering workspace for debugging. In SmarTest 8, test program files can be stored in a password-protected archive as either writable or non-writable.

 

V93000-300-HT - Test Time Analysis and Optimization on SmarTest 8

Yao He, Qualcomm; Zexin Yan, Thomas Shi and Liang Ge, Advantest

Today’s ICs have more and more features, which require increasingly complex test programs and longer test times. The V93000’s SmarTest software features tool sets and methodologies that allow engineers to search for and analyze opportunities to reduce test times while optimizing program reliability.

 

V93000-329-HT - Testing WiGig 802.11AD on the V93000

Max Seminario and Margarete Huang, Advantest

For advanced wi-fi communications, carrier frequencies in the range of 57 GHz to 64 GHz are needed to achieve the desired high throughput. This paper describes how to test at these carrier frequencies with easy-to-use RF demodulation software and debugging tools on the V93000 RF tester.

 

V93000-330-HT - 5G: Test Challenges for the Next Generation of MMWave Communications Using the V93000

Tomas Vargas, Qualcomm; Max Seminario and Jason Smith, Advantest

No matter which 5G communications standard becomes widely used, chip makers will need a solution for testing their devices at millimeter-wave carrier frequencies. This paper explains the PHY layer differences between the Verizon 5G and the 3GPP 5G standards and introduces new demodulation and debugging solutions provided by the V93000 for both standards.

 

V93000-334-HT - Migrate Device Families to SmarTest 8 in One Shot with a Hierarchical Test Program Structure

Dylan Liu and Kathy Wu, Advantest; Corey Liu and Vinuta Shetty, Nvidia

This paper introduces an optimized migration process from SmarTest 7 to SmarTest 8 that enables fast development time. Test set-up conversion, test program structure creation and test method library creation are addressed.

V93000-379-HT - Machine/Deep Learning Applications Using the V93000 and Nvidia Jetson TX2

Brian Buras, Keith Schaub and Ira Leventhal, Advantest

Machine learning (ML) techniques have been used for many years in the semiconductor industry for applications such as yield improvement and predictive maintenance. The V93000 leverages Nvidia’s Jetson TX2 AI embedded platform to identify problems that may benefit from using ML, to determine how much training data is needed, to extract features from this data for training the algorithm, and to apply this model to perform useful tasks.

 

Optimizing Productivity

V93000-207-OPT - Introducing the Recycle Pattern API

Wei-Leong Ee, Advantest 

This paper introduces the concept of a recycle pattern template to save time in loading programs. Loaded in the pattern master file list on SmarTest 7, it uses recycle API to read a pattern from the AVC file directly, which then updates the recycle pattern template and runs it as a functional test.

 

V93000-208-OPT - Vector Memory Consumption for Implementation of Multi-Clock Per Bit Protocols

Michael Grasshoff and Martin Mengers, Advantest

This paper describes and compares six approaches to implement patterns for multi-clock per bit protocols that save vector memory and decrease the cost of test. The analysis includes an investigation of which method of vector patching is appropriate for various implementations.

 

V93000-209-OPT - SmarTest 8 Corners Tool: An Advanced Table-Based Test Combinations Code Generator

Oded Olansky, Intel; Victor Pana and Oscar Solano, Advantest

The corners tool in SmarTest 8 is an advanced spreadsheet-based test programming language implemented as a Java application and Java APIs. It not only provides an advantage in faster development and characterization, but also enhances test program maintenance during high-volume production.

 

V93000-246-OPT - Using Valgrind to Ensure Error-Free Production Test Methods 

Brian Buras and Mike Kozma, Advantest 

Valgrind is a suite of widely used, free, dynamic analysis tools for debugging and profiling C++ applications. This presentation explores the general case of using Valgrind memcheck to find memory errors and leaks in C++ test method projects.

 

V93000-251-OPT - TTR Technique of the V93000 PAC Solution for Testing Automotive Airbag Safety Systems

Kai Kang and Jun Zhang, Advantest

With the AVI64 unit, the V93000 PAC (power, analog and control) solution becomes more powerful in testing all kinds of high-power devices. This paper introduces 17 TTR techniques in three levels with real case studies.

 

V93000-277-OPT - ATE DUT Verification Tool

Jeff Jhern, Advantest; Darshan Gopal and Thinh Pham, Indie Semiconductor

The V93000’s multiple instruments each have their own advantages and restrictions, which need to be considered when designing the loadboard. This paper discusses the resource limitations and the rules involved for each instrument. It also describes how to use the DUT verification tool for ATE loadboards to check schematic resource assignments.

 

V93000-281-OPT - Optimize Hysteresis Current Trimming with the AVI64 Using the HCU

Jeff Jhern, Advantest; Don Nguyen, IDT

Device trimming is a common and important test in the analog block of a device. However, this kind of test is typically very time consuming. This paper shares techniques such as binary and linear implementations that achieve high-current and high-resolution requirements while also delivering the shortest test time.

 

V93000-293-OPT - Using Origen to Create a Modular and Reusable Program Flow

Adam Kohler, John Black and Brian Caquelin, AMD

Origen is an open-source semiconductor test developer’s tool kit used for modeling devices and generating test programs. It is written in the Ruby programming language, primarily sponsored by NXP with contributors and users across several companies. Within the right framework, Origen can be used to generate entire test programs including pattern sets, which are test-platform independent.

 

V93000-295-OPT - Burst Site Data Upload Features Improve Throughput of Massive Multi-Site Test

Yinggao Xia, Jun Zhang, Liqiao Hu and Liang Ge, Advantest

The V93000’s new data upload mode or API, called burst site upload, organizes test results data from multiple sites in a “burst,” removing any overhead for site handling. Users can improve their test times with very little change in their test programs. This paper introduces this feature and explores API usage, gives code examples and compares test times through a case study.

 

V93000-311-OPT - SmarTest 8 Error Map Upload Performance Study

Xinhua Xie and Hagen Goller, Advantest; Adam Knecht, Qualcomm

With SmarTest 8, test method coding is much more user friendly than ever before and error map uploading performance is greatly improved. The hidden error map enable/disable feature can be easily controlled using the ReleaseTester API. As a result, the overhead observed by site is quite small.

 

V93000-313-OPT - Auto-Generation of Single-Wire Debug Protocol Commands

Ronald Goerke, Advantest; Muhammad Taufiq, Cypress Semiconductor

Cypress is using a proprietary EDA file format, mainly including single-wire debug (SWD) protocol commands. Advantest developed and implemented an EDA file parser that generates fully automated SmarTest 8 set-up code. By translating the customer-specific IP blocks to SmarTest 8 Java test method code, the customer was able to re-use a huge part of its existing code, reducing both development and implementation time.

 

V93000-314-OPT - Enabling SmarTest 7 Features in SmarTest 8

Chee Kin Chan and Hagen Goller, Advantest; Xiaoyu Chen, Qualcomm

Customers are starting to migrate programs to SmarTest 8. This paper looks at the challenges and solutions for transferring operations including the use of @ in-flow set-ups for looping, looping of vectors and sequential capture.

 

V93000-317-OPT - A Solution for Checking Loadboard Relay Switch Times with the V93000 to Improve OEE

Matt Chen, Advantest

Testing houses can find it difficult to calculate the appropriate timeframe for replacing relays because of the many methods to control relays with the V93000. The author proposes a solution to calculate relay-switched times accurately, no matter whether the relay is controlled by utility lines and digital pins in a test suite or test method.

 

T2000-319-OPT - T2000 Site Synchronization - Preventing Interferences in Parallel Testing Across Site Controllers

Sabri Dilmi, Harry Hou and Kazuhiro Hirano, Advantest; Vilem Bucek, ON Semiconductor

This paper introduces the concept of site controller synchronization, which ensures that both site controllers in the T2000 execute sensitive tests in parallel and at about the same time. The techniques presented in this paper allow the system to run some critical tests in serial across all DUTs and all site controllers.

 

V93000-320-OPT - Test Floor Management with TCAPI on SmarTest 8

Clifford David, Qualcomm; Liyuan Fei, Advantest

Downtime on the test floor can be costly. Qualcomm has developed a comprehensive suite of support management tools to minimize this cost. Inspired by actual “support fails” that caused extended downtime events, the tools have been shown to provide great financial advantage.

 

V93000-321-OPT - SmarTest 8 Test Flow Optimization Using TestTable

Kirk Eichler, Nvidia; Kathy Wu, Advantest

A test flow’s management, navigation and readability all suffer as the flexibility grows. SmarTest 8 addresses these concerns and offers visually simple flows with minimal branching. Various test table features are discussed and a “before” and “after” comparison of test flows is reviewed.

 

V93000-323-OPT - Test Time Analysis and Optimization for Automotive/Power Applications on the V93000

Thomas Shi, Jun Zhang, Yanan Liu and Liang Ge, Advantest

Power and automotive testing have some things in common such as complicated protocols, large numbers of relays/switches on boards and high volumes of results data to be uploaded. This paper examines ways to optimize test times for power/automotive ICs, how to identify them in test programs, available tools and selecting an optimal approach based on test time analysis results.

 

V93000-342-OPT - Continuous Integration of a SmarTest Program with Jenkins

Matt Borto and Kate Butler, Analog Devices

As test engineering teams grow larger and share development of one code base, it is more likely that program errors will be introduced. By utilizing a continuous integration (CI) tool such as Jenkins, developers can gain more confidence in their test programs and spend less time correcting integration issues, improving both productivity and quality.

 

 

V93000-365-OPT - Protocol Aware in SmarTest 8: Easy, Fast and Fully Integrated

Michael Braun and Michael Minnerop, Advantest

This paper gives an overview of the fundamental elements of a protocol aware (PA) set-up, shows examples for operating sequence and test flow integration, and examines how the standard SmarTest 8 debugging tools handle PA test content. A characterization example is given and a test method that sends characterization results to the datalog is explained.

 

V93000-369-OPT - Tips and Tricks for Testing RF/Baseband Devices in SmarTest 8

Edwin Lowery and Oscar Solano, Advantest

SmarTest 8 is a powerful development environment that provides an abstracted approach to test development. It also has many new tools that are helpful in debugging test programs. This paper explores the RF/mixed-signal debugging environment, focusing on the use of test flow, subflows and test suites. An overview of different debugging tools is given.

 

V93000-372-OPT - Tester Status: A Tool to Profile the Hardware Status from the Tester

Jia-Min Wang and Christian Rost, Advantest

During online debugging, troubleshooting a problem requires a great deal of information from the tester. With current software, collecting all of the data requires substantial manual effort. This paper introduces an API for the task. The gathered data then can be inserted at any place in the test method to query the status at that point.

 

V93000-375-OPT - SmarTest Register Panel for Interactive Device Bring-Up and Test Program Debug

Ho Kok Gho, Kheng How Tan, Wen Jing Song and Jan Van-Eyck, Advantest

With SoC devices getting more complex, there are thousands of different device state changes controlled through registers. Using SmarTest’s register panel, a user can access the register settings of a device under debug with a single click. This helps users to improve register debugging efficiency for proprietary device protocols, customize register panel layout, and add new register panel features.

 

V93000-385-OPT – Pattern Burst Builder for Scan

David Sinclair, AMD

The tasks of delivering patterns and inserting them into pattern bursts are good candidates for automation. With the Burstbuilder database, a user defines what types of patterns each burst will contain and then Burstbuilder automatically creates and updates the test program files. This frees engineers to focus on value-added work.

 

 

Test Methodology

V93000-212-TM - How to Make Best Use of the Smart Scale Per-Pin Time Measurement Unit (TMU)

Jochen Rueter, Advantest

The time measurement unit (TMU) integrated into every channel of V93000 digital cards is a versatile measuring instrument with a broad range of potential applications. This presentation gives an overview of TMU applications, from simple frequency measurements to sophisticated tasks such as jitter measurement and separation by post processing, using the powerful device test API methods built into SmarTest 8 software.

 

V93000-222-TM - A TMU Scope Tool: Waveform/Eye Diagram Tool Implemented for the TMU 

Xurong Cao, Yeqing Wang, Takumi Hayashi and Kenichi Nagatani, Advantest

An eye diagram is a common method for analyzing high-speed digital signals. A new time measurement unit tool named the TMU Scope Tool does not require strict timing conditions and can easily be built into device test programs. It can obtain time stamps by repeated reshuffling, and then reconstruct a waveform and eye diagram.

 

V93000-224-TM - A Low-Cost Phase Noise Measurement Methodology using the V93000 TMU

Takashi Lino, Advantest

The author explains the mathematical principle and device program implementation converting from time interval errors (TIE) to phase noise. The performance results, stability and measurement range are shown with the validation results from several types of V93000 systems.

 

T2000-226-TM - Test Challenges of Ultra-High Dynamic Range with Multi-DUT for High-Resolution Audio

Takahiro Nakajima and Jeongseob Kim, Advantest;  Eunil Kim, Samsung 

The key devices for high-resolution audio, which extends beyond the 16-bit/44.1 kHz CD standard, are 24-bit and 32-bit DACs. These ICs require a multi-site test solution that enables higher dynamic range performance while improving turnaround time for characterization and mass production.

 

V93000-229-TM - The Rapidly Delivery Solution for DDR4 PHY Test in 4G BBAP Devices on the V93000

Taotao Li and Qing Li, Advantest

The methodology for DDR4 PHY testing is mainly BIST loopback controlled by JTAG protocol. This paper details the framework for DDR debugging including how it works and how to improve debugging efficiency to help get DDR programs into production rapidly.

 

Other-230-TM - Dynamic Fast Programming Images to Multi I2C Serial EEPROM in an MCM with EVA100

Michel Paradis, Dany Minier, Stephane Desputeau and Patrice Ducharme, IBM Canada; Bin Wang, Advantest

To boost the capacity of a customer’s production test flow, test cycle times needed to be drastically cut. This paper explains how the authors reduced the test time for multi 12C EEPROMs from 2.6 minutes to 26 seconds using the EVA100.

 

V93000-235-TM - High-Efficiency, High-Current Trim to USB Power Delivery Switch Using the AVI64 Floating Pulse Current Unit

Jincheng Zhang, Zhiyuan Wang and Chao Wang, Advantest; Max Pan, NXP Semiconductor

Minimizing the production test time for any device is a key financial metric. This paper illustrates how to combine current sources to increase the pulse width of high-current devices as well as how to use COGO to do a binary search in a limited time to get the best trim code.

 

V93000-236-TM - Set Up, Update, Execute: SmarTest 7 Test Program Migration to a SmarTest 8 DS-API-Based Project

Oren Snir, Advantest

This presentation walks through the technical steps and considerations required for converting a test program from SmarTest 7 to SmarTest 8 using a device set-up API (DS-API) based project. The author shows an example of SmarTest 7 source code and the corresponding DS-API based SmarTest 8 source code, the created specification files and the relevant test flow part.

 

V93000-244-TM - Best Practices of Testing PSI5 Automotive Sensors

Andreas Ober, Advantest

The major challenge in testing the peripheral sensor interface 5 (PSI5) is that the interface acts as a supply for the sensor and uses the same line for digital communication between the nodes. Test systems must perform digital and precise analog measurements on this line with a seamless transition in between. Additionally, a high number of sites must be tested without using any circuitry on the loadboard to reach an optimal cost of test.

 

T2000-247-TM - Accuracy and Stability Improvement Methodologies on T2000 IPS Applications

Qi Cheng, Weiqiang Yang and Sabri Dilmi, Advantest

Today’s automotive and PMIC devices need more and more tests with higher requirements for accuracy and stability of voltage/current force and measures. The T2000 IPS is highly capable of performing these functions.

 

V93000-248-TM - High-Speed ADC Testing Challenges and Solutions for ATE

Chirag Patel and Richard Hanvey, Analog Devices

This presentation demonstrates the impact of the Wave Scale Precision Source-Pogo Direct (WSPS-PD) as a precision clock signal provided to an ADC. It shows recommended DUT board components to facilitate proper routing of the clock signal to the device. Typical performance data is presented.

 

V93000-257-TM - First Implementation of the I3C Communication on the V93000 Tester

Angelo Zucchetti and Yang Lin, Advantest;  Zhongxing Lu, Bosch Sensortec

The high-throughput, low-power I3C interface for sensors and sensor hubs used in mobile applications can be tested on the V93000 platform. Test results and code examples are given, showing how the I3C interface can be efficiently implemented.

 

T2000-265-TM - Efficient Fast IDDQ Execution on the T2000: MMXH IDDQ Function for Automotive Devices

Alessandro Rugginenti, Advantest

Using IDDQ testing to measure a CMOS device’s current consumption in quiescent mode is the most common strategy to identify any defects. In exploring MMXH IDDQ features, their advantages and how to reduce test times, this paper focuses on loadboard design and test program implementation for an automotive device.

 

V93000-266-TM - Fast Tera-Ohm Measurement Approach Using the AVI64 DC Scale Card

Regis Poirier, Innova-test; Joern Stolle, Advantest; Martin Froehle, Hermann Weindl and Martin Naiman, Global Foundries

Using low-power test conditions, the V93000 AVI64 system can measure mega-ohm resistor structures and giga-ohm isolation resistors. Now an approach has been developed to test very-high-power resistors, and it is suitable for production-volume testing. This enables the measurement of resistor values up to a few tera-ohms at speeds approximately 5X faster than dedicated bench tools.

 

V93000-268-TM - Yield Optimization Through Thermal and Power Profiling on the V93000

Brent Bullock, Advantest; John Yi, AMD; Dave Edwards, Test Spectrum

Thermal excursions on high-power devices during testing can result in over- or under-testing of devices, which affects yield and accuracy of performance tests. Collecting thermal and power data across the entire V93000 test flow is feasible. It can be mapped to test flow content for yield optimization, improved performance test accuracy and problem solving of thermal control or power-related problems.

 

V93000-271-TM - FVI16: Next-Generation Floating Power VI for Efficient and High-Quality Power Test

Toni Dirscherl, Advantest

This paper introduces Advantest’s Floating Power VI source FVI16 and its feature set to achieve economic test times and reliable set-ups including the digital regulation architecture, the integrated fast current clamp and the real-time monitoring of Kelvin connections. Sixteen fully floating individual channels offer maximum flexibility to create set-ups with user-friendly software support.

 

V93000-287-TM - Ultra-Low-Noise LNA Testing Using Wave Scale RF

Ping Wang, Xian Lee, Frank Goh, Dirk Matuszczak, Haixia Guo, Chenpeng Huang and Raymond Shie, Advantest

Commonly found in high-end consumer wireless equipment, low-noise amplifiers (LNA) are crucial in the wireless receiver chain regardless of the receiver architecture. An amplifier’s low noise figure (NF) is needed to enhance the receiver’s sensitivity to very-low-power signals. This paper discusses how to test LNA devices on the V93000 Wave Scale RF system.

 

T2000-289-TM - UHF Tag RF-IF Massive Parallel Test Method Using the Digital Module

Koji Ashino, Advantest

UHF tag ICs are generally evaluated using RF measuring instruments. But since RF modules have a small number of channels, this test method is unnecessarily expensive. One solution is to use digital modules with many channels. The author explains this test method and shares evaluation results.

 

V93000-308-TM - Challenges of Testing EVM and ACLR in One Shot for a 4G LTE Transceiver

Eng-Keong Tan, Rober Chen, Masayuki Yoshinaga and Ping Ge, Advantest; Craig Li, Mediatek

Error vector magnitude (EVM) and adjacent channel leakage ratio (ACLR) can be combined into one test, meaning that only a single capture is needed. This paper discusses how to make use of SmarTest 8’s set-up with Wave Scale RF and Wave Scale MX to conduct this test successfully and save test time.

 

V93000-310-TM - Efficient Handling of Digital RF and Similar Serial Interfaces Using Clock Data Recovery (CDR)

Alexander Roskin, Martin Dresler and Hao Chen, Advantest; Javier Medina, Phong Pham, Spreadtrum

With the oversampling clock data recovery (CDR) hardware-based solution on the V93000, test methodology can be based on the unique capabilities of the hardware. This presentation shows how phase alignment and cycle alignment, based on capture arming at a certain header sequence, can be implemented under SmarTest 8 on Pin Scale 1600 and Pin Scale 9G digital cards.

 

V93000-315-TM - Engine Control Chip Platform Transfer to V93000 Technology

Yong Zhang, NXP Semiconductor

An engine control device is intended to control power MOSFETs driving solenoid valves in automotive applications. Current enters the device through two pins. The AVI64 can be used to set an accurate input voltage and perform an AWG special function on the pins.

 

T2000-318-TM - Dynamic Part Average Testing for Automotive IC Final Testing on the T2000

Willy De Man, ON Semiconductor

This paper demonstrates the application of dynamic part average testing (DPAT) at the final testing stage and how this is implemented on the T2000 platform. Thorough analysis has demonstrated that DPAT is interesting to improve the fault coverage on parameters that are strongly process-dependent.

 

V93000-326-TM - Hidden Vector Patching on the V93000

Jun Zhang, Liang Ge and Yinggao Xia, Advantest

To patch vector data on the fly, the V93000 must access vector memory and change the content, which is a time-consuming process. To improve throughput, pattern patching can be hidden behind other ATE jobs. The “cover” pattern’s size and speed determine the efficiency of hidden vector patching, which is supported by new features of SmarTest 8.

 

V93000-337-TM - A Method for Test While Dealing with Jitter Transfer on ATE

Kenichi Nagatani, Takashi Iino, Qiang Zhou and Haizhou Xu, Advantest

Jitter can result in failed test results when using ordinary test methods. This paper shows how to test functionality while dealing with jitter and how to measure jitter considering the jitter transfer function with ATE.

 

V93000-343-TM - Precision ADC Testing

Jeff Brenner and Sascha Kraenzlein, Advantest

Unlike other ADCs, high-precision ADCs are typically characterized by performance specifications in terms of parts per million (PPM) errors. This presentation provides an overview and differentiation of the successive approximation register (SAR) and Delta-Sigma architectures as well as covering typical test items for each of these high-precision ADC converter types.

 

V93000-376-TM - Case Study of Testing a 802.11ax MIMO Device on a V93000 Wave Scale System

Jie Ren, Advantest

The 802.11ax standard is the next step in the evolution of wi-fi, designed for dense connectivity and improved efficiency. It also raises new test challenges including high-level device information, wider bandwidths, higher site counts and the need for greater flexibility in ATE.

 

Other-386-TM - Cloud Testing Service Multi-Pattern Execution IP

A.T. Sivaram and Yasuji Oyama, Advantest

Cloud Testing Service offers GUI-based IP that implements multi-pattern execution together with searches and shmoo integration. By using this new IP, design and verification engineers can improve their productivity by focusing on generating test data instead of generating code. This paper describes the versatile multi-pattern execution plug-in and discusses the efficiencies of this approach compared to existing analysis tools such as search and shmoo plot.

 

V93000-389-TM - Omnipotent Temperature Monitor to Prevent Hardware Damage from Thermal Runaway

Nolan Riley, Texas Instruments

This presentation covers a foolproof method of preventing hardware damage due to DUT thermal runaway during debug and test. The new system, which continuously monitors a device’s temperature, has been tested across numerous loadboards on multiple devices. Self-stored statistics show that hundreds of thousands of dollars in test hardware has likely been saved.

 

 

Hardware & Software Design Integration

V93000-220-HSI - Introduction to SmarTest 8 Prober and Handler Equipment Simulation

Pierre Gauthier, Advantest

Because access to probers and handlers for developing or customizing drivers is typically very limited for cost and availability reasons, using simulators makes sense in some cases. This paper explains how to use SmarTest 8 prober and handler simulators. Source code customization and how to customize standard drivers are covered.

 

V93000-269-HSI - Tabular-Based RF Library for Quick Development on SmarTest 8

Chenpeng Huang and Frank Goh, Advantest

End users often struggle with changing and tracking set-up values throughout an entire production lifetime. The SmarTest 8 environment uses tabular profile parameters to implement complete RF test suites with almost no need to maintain Java code, allowing users to focus on their device-testing schemes.

 

V93000-278-HSI - Direct Dock™ RF Probe Design Considerations on Advantest Wave Scale RF Systems

Jeff Jhern and Daniel Lam, Advantest; Thinh Pham and Darshan Gopal, Indie Semiconductor

This paper addresses the technical challenges in designing a RF probe card, specifically involving the new Wave Scale RF Direct Dock™ solution. Technical issues faced in wafer-level probing, bridge beam features that improve alignment, and probe card planarization procedures are covered.

 

V93000-301-HSI - Complex Analog DC Resource Assignment and Loadboard Design on the V93000

Zhaoyang Wang, NXP Semiconductor; Lydia Jiang, Yaojuan Xu and Soma Tsuj, Advantest

Loadboard design is key in testing complex analog DC devices for automotive applications. This presentation discusses how to assess test solutions available on the V93000 PAC system. A real loadboard case is shown.

 

V93000-307-HSI - Utilizing the Powerful Features of the Operating Sequence in SmarTest 8

Eng-Keong Tan, Rober Chen, Masayuki Yoshinaga and Ping Ge, Advantest; Craig Li, Mediatek

A new SmarTest 8 feature called operating sequence enables synchronized parallel execution on instruments of different domains including digital, DC, mixed-signal, RF and protocol aware. This allows effective testing of 4G LTE transceivers in the shortest test times. This paper covers TX and RX tests and debugging while sharing actual examples.

 

V93000-309-HSI - RF and Baseband Site-Interlacing vs. Site-Sequencing with SmarTest 8 and Wave Scale

Eng-Keong Tan, Masayuki Yoshinaga, Rober Chen and Ping Ge, Advantest; Craig Li, Mediatek

Site-interlacing is one of the most commonly used techniques to reduce test times. This paper introduces site-sequencing which, in some cases, can be combined with site-interlacing to optimize test times and resource usage.

 

V93000-324-HSI - Develop and Debug Test Methods Without Compile: Introduction to Scripting Test Methods

Jiamin Wang, Advantest

The paper introduces a script-based test method that natively supports tester features such as burst, multi-site, smart calculation, common thread and more without additional wording. This frees users from learning a new programming language. In addition, frequently used V93000 functions and user-defined or pre-registered subroutines are supported.

 

V93000-338-HSI - How to Challenge the Thermal Testing of LEDs on the V93000 with SmarTest 8

Yasuhiro Kizu and Markus Seuring, Advantest, Advantest

Thermal control is a significant concern in testing LEDs. The V93000’s special chiller hardware and SmarTest 8 software enable LED testing with thermal control up to 150 degrees. In addition, the test cell’s protocol-aware mechanism makes it easy to handle multiple LED configurations.

 

V93000-368-HSI - Requirements for Automotive Loadboard Checkers

Michael Baumgartner, Advantest

In automotive device testing, high standards are implemented for safety reasons. A loadboard checker not only ensures full testing of automotive ICs, but also puts the loadboard into operation and repair modes.

 

V93000-373-HSI - Behind the Scenes of SmarTest 8: Software Components When Software is in Action

Berrin Blank, Advantest

With SmarTest 8, Advantest introduced a new software architecture for the V93000 tester. By understanding the software’s major components, users can get the most from it. This paper guides users through the main software blocks involved in executing a test program, from set-up in the SmarTest Workcenter (SWC) all the way to the hardware.

 

V93000-374-HSI - Current DAC Test Solutions with the AVI64

Yang Lin and Crystal Zheng, Advantest; Zhongxing Lu, Bosch Sensortec

Performing high-accuracy linearity testing of current DAC in Micro mirror ASCII chips presents a challenge for traditional analog resource solutions. The AVI64 unit provides a new but suitable solution. This paper reviews a real case study.

 

V93000-381-HSI - From Simulation to Bench-Like Characterization with SmarTest 8 Protocol Aware

Frank Hensel, Olaf Poeppe and Michael Richter, Advantest

While the V93000 can perform the initial turn on, validation and characterization of new chip designs, the test method should be as close as possible to the validation content used by the designers in their simulation test bench environment. This paper presents the example of a test chip whose design is mainly digital with a proprietary HSIO interface, but includes analog components also.

 

VOICE 2018 Papers for Taiwan

 

*Note: The Technical Program information and schedule are subject to change

 

Device-Specific Testing

V93000-234-DST - TIA Gain Test Solution by Pin Scale SL Driving a Small Signal with an Attenuator

Lei Wang, Advantest

Customers need very small swings of less than 10 mv and high-data-rate signals to address TIA applications. One solid and reliable solution can be achieved with the V93000 platform, Pin Scale SL, an attenuator and a band-pass filter.

 

V93000-352-DST - Wave Scale RF Develops a “From Scratch” Testing Solution of IEEE802.11n in Just 3 Months

Zeki Chen, Ping Ge and Eng-Keong Tan, Advantest

The Wave Scale generation of channel cards for the V93000 platform enables highly parallel, multi-site and in-site testing that dramatically reduces the cost of test and ultimately time to market for current and future devices. A test program conversion project was conducted and correlated in just three months using SmarTest 8 and site-interlacing.

 

Internet of Things (IoT)

V93000-262-IoT - A Low-Cost Generic Motherboard Solution for IoT Devices

Jiayan Sun and Haiying Zheng, Advantest

This paper shows an entire motherboard and daughterboard solution for testing IoT devices. The characteristics of current Chinese IoT devices are analyzed and a solution is presented that is not only convenient for correlation and debugging, but also works for mass-production maintenance. This offers a big cost advantage for fabless companies and OSATs.

 

V93000-267-IoT - V93000 Test Solution for a Narrow-Band (NB) IoT Device

Pu Lei, Daniel Sun, Frank Goh, Yongjun Hu and Max Seminario, Advantest; Lei Hua, Sanechips

Narrow-band IoT (NB-IoT), a wide-area-network solution evolved from LTE, is the latest wireless standard for IoT. Applications include intelligent lighting, smart meters, smart parking, pet tracking and more. A case study of a NB-IoT device currently in production is presented.

 

V93000-370-IoT - Modern LTE IoT, Technology, Learnings and x16 Volume Testing on Port Scale RF

Jerry Chen, Edwin Lowery and Kimi Chiang, Advantest; Jerry Yang, MediaTek

To realize multi-site testing of narrow-band IoT modules, semi-parallel testing can be used. This also minimizes the tester resources required. With site-interlacing, test program coding can be done with minimum modification while also improving testing efficiency.

 

Hot Topics

V93000-228-HT V93000 - SmartShell: The Universal SmarTest 8 Scripting Interface for Design and Production

Jinlei Liu, Rita Lu and Liang Ge, Advantest

A universal scripting interface on the V93000 SoC system supports fast and easy bring-up for design and production. It allows the user to focus on device challenges, not on resolving any issues on the ATE system. This improves both productivity and efficiency in terms of time to market and time to qualification.

 

V93000-239-HT - AVI64 Application for Automotive Lithium Ion Battery Monitoring Device

Kun Xu, Advantest; Jiazuo Wang, RDA Microelectronics

The automotive electronics market is growing rapidly, especially the electric car segments. This paper introduces a test solution for battery-monitoring devices. For high-accuracy calibration requirements such as band gap and reference voltage, the AVI64 delivers higher accuracy within 2 mV. For mixed-signal dynamic testing, the AVI64 can be used as an analog waveform generator.

 

V93000-240-HT - Monitoring Evolutionary Algorithm in Device Testing

Kun Xu and Songmiao Wang, Advantest; Yuxiang Tian, Spreadtrum Communications

The semiconductor fabrication and packaging process inevitably introduces some errors and parameter shifts. The device testing environment also introduces some uncertainty factors that can affect test results and even test quality. This paper proposes a new algorithm to monitor real-time DC test data during mass production.

 

V93000-334-HT - Migrate Device Families to SmarTest 8 in One Shot with a Hierarchical Test Program Structure

Dylan Liu and Kathy Wu, Advantest; Corey Liu and Vinuta Shetty, Nvidia

This paper introduces an optimized migration process from SmarTest 7 to SmarTest 8 that enables fast development time. Test set-up conversion, test program structure creation and test method library creation are addressed.

 

Optimizing Productivity

V93000-258-OPT - A Novel Solution of Protocol Setting Auto-Wrapper for the V93000

Jimmy Sun and Zhiyuan Wang, Advantest

Register setting via different protocols, such as JTAG, I2C and SPI, is very common in SoC testing. This paper introduces a novel solution that helps user to easily generate protocol wrapper functions across the SmarTest7 and SmarTest 8 platforms. It also provides a user-friendly web GUI, which can show the actual vector cycle diagram of the protocol setting.

 

V93000-260-OPT - dcVI measureWaveform for Tip Burnt Prevention Tool on SmarTest 8

Kevin Fan and Catherine Chen, Advantest

Power delivery via probe cards has become a critical challenge for 10-nm technology and beyond. A current-detection tool is needed to prevent the maximum current setting from causing a tip burnt issue. This paper illustrates how to prevent problems by collecting the operating current on all test suites with a good device, then creating a report to help users modify the “ilimit” setting.

 

V93000-270-OPT - RF Production Set-Up of Highly Sensitive RF Devices on Wave Scale RF

Frank Goh, Xian Lee, Raymond Shie, Ping Wang, Vincent Liu and Haixia Guo, Advantest

Some RF testing is particularly sensitive to ambient noise and interference. This paper examines a highly sensitive RF device, a low-noise amplifier (LNA) and the hardware set-up RF isolation technique used as well as the required SmarTest 8 set-up. Production data such as repeatability results are shown.

 

T2000-294-OPT - T2000 Auto-Z of Prober in the Implementation of a Wafer Test Solution

D.J. Peng, Advantest; Tsungheng Lee, Ardentec

To enhance T2000 throughput, prober set-up time must be reduced. A GUI tool has been developed to handle prober chuck position settings and qualify probe card quality automatically. The tool can optimize the prober contact position, increase probe card lifetime and improve production yield.

 

V93000-305-OPT - SmarTest 7 to SmarTest 8 Conversion Experience Sharing with a Transceiver Device

Eng-Keong Tan, Ping Ge, Rober Chen and Masayuki Yoshinaga, Advantest

Although there are guidelines for the conversion process from SmarTest 7 to SmarTest 8, challenges still arise. This paper presents actual customer conversion projects on 4G LTE transceiver devices, addresses all considerations and provides suggestions and solutions. Examples and results are shown.

 

V93000-306-OPT - SmarTest 8 Tools for Pattern Conversion from ASCII to Binary and Exceed X4 Mode Wave Table Arrangement

Sammy Wei, Advantest

This paper introduces a smart pattern conversion tool to convert an ASCII test pattern to binary directly for the SmarTest 8 environment. Test engineers can then convert the source patterns and debug them directly. The tool not only assists SmarTest 8 users by reducing their engineering effort, but also helps to make test program development go smoothly.

 

V93000-323-OPT - Test Time Analysis and Optimization for Automotive/Power Applications on the V93000

Thomas Shi, Jun Zhang, Yanan Liu and Liang Ge, Advantest

Power and automotive testing have some things in common such as complicated protocols, large numbers of relays/switches on boards and high volumes of results data to be uploaded. This paper addresses ways to optimize test times for power/automotive ICs, how to identify them in test programs, the available tools and how to select an optimal approach based on test time analysis results.

 

V93000-340-OPT - Maximize Multi-Site Efficiency by Hidden Upload/Calculation of SmartRDI

Chi Liang Hsia and Kuanlin Chen, NXP Semiconductor

After applying several test time reduction techniques to the 24-site test program for an audio amplifier, the authors found that the multi-site efficiency (MSE) was only 97.5%. By reviewing the background processing time of each test suite and optimizing the test suite sequence, the MSE can be pushed to 99.2% and the test time reduced by 25% from 4,579 ms to 3,415 ms.

 

V93000-346-OPT - Optimized Probe Tip Life Cycle at Wafer Probing by a New On-Demand Clean Methodology

Pin Chen, Qualcomm

Periodic on-line cleaning of probe tips is an effective way to remove contamination. However, this cleaning consumes the tip length as significantly as probing. This paper presents a new probe-tip cleaning methodology at wafer probing, called on-demand clean, to perform probe card cleaning intelligently by setting up adaptive rules from the test results during production.

 

Test Methodology

V93000-222-TM - A TMU Scope Tool: Waveform/Eye Diagram Tool Implemented for the TMU

Xurong Cao, Yeqing Wang, Takumi Hayashi and Kenichi Nagatani, Advantest

An eye diagram is a common method for analyzing high-speed digital signals. A new time measurement unit tool named the TMU Scope Tool does not require strict timing conditions and can easily be built into device test programs. It can obtain time stamps by repeated reshuffling, and then reconstruct a waveform and eye diagram.

 

V93000-235-TM - High-Efficiency, High-Current Trim to USB Power Delivery Switch Using the AVI64 Floating Pulse Current Unit

Jincheng Zhang, Zhiyuan Wang and Chao Wang, Advantest; Max Pan, NXP Semiconductor 

Minimizing the production test time for any device is a key financial metric. This paper illustrates how to combine current sources to increase the pulse width of high-current devices as well as how to use COGO to do a binary search in a limited time to get the best trim code.

 

V93000-242-TM - A GUI Tool for Dynamic DC Test with SmartRDI Test Method on PROD Test Pattern

Peter Chiu and Uky Huang, Nvidia

A GUI tool has been developed to regenerate test programs interactively and automatically on the target pattern for dynamic DC experiments. This has great potential to shorten the time needed to create an RDI test program for dynamic DC characterization on the pattern verification together with the RDI-based test method.

 

V93000-257-TM - First Implementation of the I3C Communication on the V93000 Tester

Angelo Zucchetti and Yang Lin, Advantest; Zhongxing Lu, Bosch Sensortec

The high-throughput, low-power I3C interface for sensors and sensor hubs used in mobile applications can be tested on the V93000 platform. Test results and code examples are given, showing how the I3C interface can be efficiently implemented.

 

V93000-284-TM - Introducing Protocol Aware Set-Up Auto Generation Methodology on SmarTest 8

Yu Wang and Eng-Keong Tan, Advantest

Protocol aware is the key communication method for highly integrated SoC devices, but generating the transequences can be time consuming. This paper introduces a methodology for auto-generation of set-up files and transequences, which streamlines test program development efforts and speeds up time to market.

 

V93000-285-TM - Some Hands-On Experience Sharing in Converting Test Methods Code from SmarTest 7 to SmarTest 8

Corey Liu and Vinuta Shetty, Nvidia

It can be challenging for test engineers to convert their current test methods code from SmarTest 7 to SmarTest 8. This presentation focuses on issues including how to take advantages of features such as inheritance and object orientation in Java when writing test methods code and how to best leverage SmarTest 8.

 

V93000-287-TM - Ultra-Low-Noise LNA Testing Using Wave Scale RF

Ping Wang, Xian Lee, Frank Goh, Dirk Matuszczak, Haixia Guo, Chenpeng Huang and Raymond Shie, Advantest

Commonly found in high-end consumer wireless equipment, low-noise amplifiers (LNA) are crucial in the wireless receiver chain regardless of the receiver architecture. An amplifier’s low noise figure (NF) is needed to enhance the receiver’s sensitivity to very-low-power signals. This paper discusses how to test LNA devices on the V93000 Wave Scale RF system.

 

Other-302-TM - Parallel Test Method for LCD Driver IC Using the PHT Function

Yasushi Shouji and Jiro Noda, Advantest

LCD driver ICs have become essential for smart phones’ high-resolution displays, touch panels and authentication. This paper discusses a newly developed parallel high-speed test (PHT) function for the T6391 LCD driver IC tester that allows users to concurrently perform functional testing of individual IP in the IC, a key to reducing the cost of test.

 

V93000-310-TM - Efficient Handling of Digital RF and Similar Serial Interfaces Using Clock Data Recovery (CDR)

Alexander Roskin, Martin Dresler and Hao Chen, Advantest; Javier Medina and Phong Pham, Spreadtrum

With the oversampling clock data recovery (CDR) hardware-based solution on the V93000, test methodology can be based on the unique capabilities of the hardware. This presentation shows how phase alignment and cycle alignment, based on capture arming at a certain header sequence, can be implemented under SmarTest 8 on Pin Scale 1600 and Pin Scale 9G digital cards.

 

V93000-326-TM - Hidden Vector Patching on the V93000

Jun Zhang, Liang Ge and Yinggao Xia, Advantest

To patch vector data on the fly, the V93000 must access vector memory and change the content, which is a time-consuming process. To improve throughput, pattern patching can be hidden behind other ATE jobs. The “cover” pattern’s size and speed determine the efficiency of hidden vector patching, which is supported by new features of SmarTest 8.

 

V93000-333-TM - An Advanced FFV Tool Supporting X-Mode Pattern and Automatic Datalog Collection

Kuo-Feng Tseng and Chien-Fu Huang, Advantest

During functional testing, a customer usually has many patterns to verify. Now an advanced FFV tool not only supports multi-site testing, but also offers an additional function called production mode that helps customers to automatically generate a FFV report for each device. This makes pattern verification and debugging faster and easier.

 

Hardware & Software Design Integration

V93000-269-HSI - Tabular-Based RF Library for Quick Development on SmarTest 8

Chenpeng Huang and Frank Goh, Advantest

End users often struggle with changing and tracking set-up values throughout an entire production lifetime. The SmarTest 8 environment uses tabular profile parameters to implement complete RF test suites with almost no need to maintain Java code, allowing users to focus on their device-testing schemes.

 

V93000-307-HSI - Utilizing the Powerful Features of the Operating Sequence in SmarTest 8

Eng-Keong Tan, Rober Chen, Masayuki Yoshinaga and Ping Ge, Advantest; Craig Li, Mediatek

A new SmarTest 8 feature called operating sequence enables synchronized parallel execution on instruments of different domains including digital, DC, mixed-signal, RF and protocol aware. This allows effective testing of 4G LTE transceivers in the shortest test times. This paper covers TX and RX tests and debugging while sharing actual examples.

 

V93000-331-HSI - Automatic Device Characterization and Highly Integrated Data Analysis Tool in Both Mass Production and Device Verification

Duke Kuo, Advantest

When test engineers start to develop a test program for device characterization, much time and effort is invested in collecting test results for all necessary conditions. The overall engineering time can take longer than program development. The author introduces a new smart tool that uses a simple CSV format file to help calculate and centralize all test data.

 

V93000-374-HSI - Current DAC Test Solutions with the AVI64

Yang Lin and Crystal Zheng, Advantest; Zhongxing Lu, Bosch Sensortec

Performing high-accuracy linearity testing of current DAC in Micro mirror ASCII chips presents a challenge for traditional analog resource solutions. The AVI64 unit provides a new but suitable solution. This paper reviews a real case study.