Workshop Day
June 6, 2024
Advantest's VOICE Workshop Day, following the VOICE 2024 Developer Conference, provides attendees with an opportunity to participate in full day technical sessions covering V93000 Advanced RF Demodulation and V93000 High Performance Computation Test Methodologies and Practices.
Your Workshop Day Registration Entitles You to:
▸ Direct access to Advantest product experts during the live workshop sessions.
▸ Hands-on experience through the use of web-hosted virtual machines in select sessions. Attendees should bring their own PCs for access to virtual machines.
▸ Post-VOICE access to both Workshop session courses online at the Advantest Dojo.
e-Workshop Day
June 19, 2024
Advantest's VOICE Workshop Day, has been extended to enable remote participation in live eSeminar sessions. These will be held twice, covering two time zones, on June 19, 2024.
Session Topics
The advancement of complex OFDM-based modulation schemes has made understanding how to demodulate signals more important than ever. High-volume manufacturing test relies on the implementation of test time-efficient algorithms, both, within the tester software as well as within the test programs written by the test engineer.
The aim of this workshop is to provide instruction on fundamentals of these modulation standards, help the attendee develop proficiency in the tools used in generating tests, and to optimize implementation to meet efficiency and throughput aspects of high-volume manufacturing
This demodulation workshop will provide an overview of OFDM-based modulation using 5G NR and WiFi6/WiFi7 as vehicles. It will focus on educating the attendee on the latest available demodulation-related debug tools.
Through lectures, demos, and hands-on experiences utilizing web-hosted virtual machines, attendees will gain practical knowledge of 5G NR and WiFi6/7 modulation and demodulation techniques including generating waveforms and demodulating them on the V93000.
This workshop will also provide an opportunity to engage with peers and experts within the WLAN test community.
Key Topics1:
- Digital modulation fundamentals (emphasis on OFDM-based signals for 5G NR and WiFi)
- V93000 demodulation test solution overview
- Generating 5G NR and WiFi7 signals with Signal Studio
- Best practices and newest tools for demodulating signals on the V93000
- Hands-On: Demodulating 5G NR on the V93000
- Hands-On: Demodulating WiFi6/7 on the V93000
Additionally, the workshop provides:
- Access to Advantest demodulation experts
- Hands on experience through the utilization of web-hosted virtual machine Smartest 8 sessions
The ongoing scaling of designs to address Machine Learning (ML), Artificial Intelligence (AI) and high site count Application Processors leads to challenges in meeting the practical implementation of power requirements for device testing. Additionally, the PHY interfaces of these devices challenge the bandwidth and features of standard configuration ATE hardware.
This High Performance Computation (HPC) workshop will focus on sharing methodologies and best practices for addressing the power, PHY and pattern memory testing challenges of these devices.
Key Topics1:
- Solutions and implementations to address existing and future very high current system configurations
- Observability and regulation of power domains of high current, high pin count, high core count and large gate array devices
- Matching regulation of ATE power to dynamic device load conditions
- Device interface protection to mitigate probe tip and contactor burn
- PCB design processes and techniques to ensure optimal power delivery to Device Under Test
- Migration to EXA Scale generation power supplies
- Addressing PCB component area constraints
- Addressing High Voltage supply requirements for regulator integrated devices
- High speed PHY characterization
- High speed embedded clock/source synchronous interface device functional testing
- Addressing extreme pattern memory requirements in SSN
Additionally, the workshop provides:
- Access to Advantest domain experts
- Access to example implementations
Clocking and synchronization across tester instruments are central and important aspects of an ATE system. In this workshop, you will get an expert overview on the clock architecture and how instrument synchronization works inside the V93000 test system under SmarTest 8. Through practical examples and exercises, you will learn the impact of synchronization on system execution overhead and, as a result, test time. With this knowledge you will be able to identify and avoid pitfalls and optimize your test setups for optimal execution time.
The workshop will cover several types of V93000 instruments, covering different application domains: digital, DPS and RF. Both SmartScale and ExaScale instruments will be presented, with a special focus on new clock-related features introduced by PS5000 in comparison to PS1600.
Key Topics1:
- V93000 test-processor-based clock architecture overview
- SmarTest 8 clock setup: how it works and key features
- SmarTest 8 operating sequence synchronization
- Instrument synchronization
- Impact of synchronization on execution time and how to avoid overhead
- Instrument keep-alive feature
- CTIM and CTIM-immediate sequencer instructions
Additionally, the workshop provides:
- Access to Advantest domain experts
- Hands on experience through the utilization of web-hosted virtual machine Smartest 8 sessions